Computation is method + memory + sequence.

Build and operate a human-powered CPU using abaci, simple rules, and coordinated roles. Explore the interactive abacus, step through a toy program, and publish the full guide.

Try the Demos Read the Guide

Interactive Demos

Abacus Register (🧮 ACC)

Tap beads or use the inputs. Try Add, Sub, Mul, Div and watch carry/borrow propagate. Flags update live.

Z:0 C:0 N:0

Mul/Div are animated and safely capped so they always finish quickly on mobile.

ACC (Accumulator)

Peopleware CPU — Stepper

Run a tiny program with FETCH → DECODE → EXECUTE. Tap Tick to advance micro-steps. Everything is deterministic and bounded.

Instruction Set (v0) 
00 NOP  01 HALT  02 JMP [AAA]  03 JZ [AAA]  04 JNZ [AAA]
05 LOAD A,[AAA]  06 LOAD B,[AAA]  07 STORE ACC,[AAA]
08 MOV ACC,A     09 MOV ACC,B     10 ADD [AAA]
11 SUB [AAA]     12 INC ACC       13 DEC ACC       14 CMP [AAA]
Registers
PC
000
IR
--
MAR
---
MDR
-----
ACC
0
A
0
B
0
FLAGS
Z:0 C:0 N:0
Stage: IDLE
Memory (RAM)

Format: addr:value per line. Addresses 000–999. Values are numbers or opcodes with optional address (e.g., 000:05010).

🧑‍🤝‍🧑 Peopleware Roles Board
🧠
Control Unit (CU)
Stage: IDLE
🧮
PC Operator
PC: 000
🧮
IR Operator
IR: --
🧮
Memory (MAR/MDR)
MAR: --- | MDR: -----
🧮
ALU (ACC/A/B)
ACC: 0 | A: 0 | B: 0
🎏
FLAGS
Z:0 C:0 N:0
ACC (live during stepper)

Role Diagrams

Place Abaci_Roles.png and Peopleware_Roles.png in this folder (or adjust paths).

Labeled diagram of abaci as registers and memory with micro-ops
Abaci as CPU Registers & Memory
People at stations (CU, ALU, Memory, Flags) with arrows showing data flow
Peopleware Roles & Data Flow

Full Guide: Abacus-CPU (v0) — Peopleware Edition

Core Concept

Build a working “computer” using abaci (registers), a paper or abacus bank (RAM), people as operators (Control Unit, ALU, Memory), and a clock cadence. Computation flows as symbols + memory + rules + sequence.

Tools & Materials

  • Abaci: ACC, A, B, PC, IR, MAR, MDR, FLAGS; plus a RAM bank (abaci or paper ledger).
  • People: Control Unit (CU), Memory Operator, ALU Operator, Flags Operator, I/O (optional).
  • Microcode cards (rule sheets), bell/metronome (clock), paper & pencils.

Roles

  • CU: holds microcode, calls “tick”, ensures order.
  • PC: increments after each instruction.
  • IR: holds the current instruction (opcode+address).
  • Memory (MAR/MDR): resolves reads/writes.
  • ALU (ACC+A+B): performs arithmetic/logic.
  • FLAGS: updates Z (zero), C (carry), N (negative/sign).

Instruction Set (v0)

00 NOP  01 HALT  02 JMP [AAA]  03 JZ [AAA]  04 JNZ [AAA]
05 LOAD A,[AAA]  06 LOAD B,[AAA]  07 STORE ACC,[AAA]
08 MOV ACC,A     09 MOV ACC,B     10 ADD [AAA]
11 SUB [AAA]     12 INC ACC       13 DEC ACC       14 CMP [AAA]

Phases (per instruction)

  1. FETCH: MAR ← PC; MDR ← MEM[MAR]; IR ← MDR; PC ← PC + 1
  2. DECODE: CU consults microcode for IR opcode.
  3. EXECUTE: Perform the rule steps (e.g., ADD uses ripple-carry).

Why This Matters (Use Cases)

  • Education: make CPU internals tangible for learners.
  • Team-building: cooperative roles & cadence.
  • Low-tech computing: resilient, accessible, electricity-optional.
  • Philosophy: substrate-independent computation—method over machinery.

A New Foundation

Abacus-CPU reframes computing as a cultural practice: method + memory + sequence. With natural materials and coordinated people, you achieve universal computation—no silicon required.